Senior CPU Compiler Architect, Devices and Services
- Banqiao, New Taipei City
- Permanent
- Full-time
- Master's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 5 years of experience in compiler design for CPU scalar and vector engines.
- Experience with LLVM internals, back-end specifics, compiler loop improvement, resource management, scheduling, code generation.
- Experience in C or C++ and in Python or other scripting languages.
- 8 years of experience in compiler design for CPU scalar and vector engines.
- Experience with the following technologies: XLA, TVM, MLIR, LLVM, deep learning models, and algorithms.
- Experience with CPU pipeline structure and hazards, cache, and memory organization.
- Experience in LLVM scalar and vector code generation including instruction scheduling, software pipelining, register allocation, TableGen, LLVM IR, Machine IR.
- Work as a member of a compiler and performance team for next generation CPU.
- Contribute to LLVM (low level virtual machine) compiler effort.
- Deliver custom compiler for both scalar and vector or machine learning engines.
- Identify actionable performance opportunities in compiler generated code or libraries, which may involve workload analysis and performance exploration.