Provide Qualification plan, review and release qualification Define outgoing quality and reliability sampling and test plan Monitor OQRM from FAB, ASM, BE, MODULE for HVM product. Dispo deviation materials. Time to dispo. Inventrory reduction, rescreen and rework to minimize the CoNC. Review internal quality metric and drive customer DPM to BIC. Data mining and correlation all inline test data. Root cause finding and drive CA/PA. Required Associates Degree or equivalent experience Solid State Electronic Devices MOSFET, CMOS Process Related field of study Desired experience in each of the following: Semiconductor Manufacturing DRAM Fab Product QA DRAM Product Engineer DRAM Yield Engineer Strong troubleshooting skill Good organizational skills and sharp attention to detail Good written and oral communication skills Efficient computer skills Knowledge of DRAM operation and fabrication process Knowledge of DRAM wafer test, component test and module testing concept and flow. Knowledge of using statistical tools, unix and JMP. Familiarity with Unix, DFII/Cadence, and/or ATE (Auto Test Equipment) preferred Ability to work independently or in a group environment Basic understanding of electrical equipment
