Lead the development, characterization, and optimization of Dry Etch processes for advanced DRAM structures. Collaborate cross-functionally with integration, metrology, equipment, and R&D teams to ensure process robustness and manufacturability. Define and execute technical roadmaps aligned with DRAM scaling requirements and yield improvement goals. Evaluate and implement new etch technologies, chemistries, and hardware platforms. Mentor and guide junior engineers; foster a culture of innovation and technical excellence. Interface with equipment vendors and external partners to co-develop solutions. Drive root cause analysis and continuous improvement initiatives for process-related issues. Present findings and recommendations to executive leadership and global teams. Ph.D. or Master's degree in Electrical Engineering, Materials Science, Chemical Engineering, Physics, or related field. Minimum 10 years of hands-on experience in Dry Etch process development, preferably in DRAM or advanced memory technologies. Proven track record of technical leadership in semiconductor process engineering. Deep understanding of plasma etch mechanisms, process control, and defect mitigation. Experience with advanced etch tools (e.g., Lam, TEL, AMAT) and process characterization techniques. Strong analytical, problem-solving, and communication skills. Ability to lead cross-functional teams and manage complex projects. Experience with high aspect ratio etching, critical dimension control, and selectivity challenges in DRAM. Familiarity with data analytics, DOE methodologies, and SPC tools. Knowledge of integration challenges in sub-20nm DRAM nodes.
