【2024 Campus Recruitment】TSMC DTP Engineer

台積電

  • Taiwan
  • Permanent
  • Full-time
  • 2 months ago
Job ResponsibilitiesAt the beginning of new module research, IC design engineers and R&D engineers would closely cooperate with customers.Once the new module technologies are developed, we could accomplish the goal of massive production and have customers' new product launch in a short time. At TSMC, you will have the opportunity to work with the most advanced module technologies, provide solutions to partners in the global IC design ecosystem, and ensure competitiveness in power, performance, and area.【Physical Designer】The principal responsibility of the candidate is to perform complete netlist to GDS physical design steps which include floor plan, PNR, timing closure, IR/EM analysis, layout verification, formal verification, and other tape out related tasks. The candidate will work in a talented team to design advanced chips using cutting-edge process nodes while meeting high standard design requirements.【Standard Cell Engineer】1. Pathfinding of library characterization for leading edge tech nodes2. Support industrial standard library kits generation and QC3. In-house library generation flow and/or utility development4. RC parasitic extraction analysis and APR related analysis【Layout Engineer】1. IC layout for advanced technology (Std. cell/Memory/AMS/IO)2. Layout structure development for new technology3. Pathfinding for new technology development4. Customer engagement and layout support5. Design and technology co-optimization (DTCO)6. AI and automation for layout and physical design【System and Chip Design Solutions Development】Please refer to the Link:【FE design & DFT】1. Test chips development for advanced nodes, including physical design (APR), logic synthesis and DFT (Scan insertion + ATPG)2. Design flow development for test chips design, which requires the programming skills, Tcl, Python, C-shell scripting etc.3. Technology benchmarking for PPA evaluation of the advanced nodes4. DTCO (Design & Technology Co-Optimization) pathfinding and development【SRAM Engineer】1. SRAM design in advanced nodes for mobile, high-performance computing, IoT, automotive applications.2. RRAM/MRAM, emerging memory development3. In memory computing research and development【Design Flow/Methodology】1. Advanced technology process design kits (PDK) and tech files (DRC, LVS, RC, etc.) development and technical support2. Advanced technology design development flow development and technical support3. Automation program development to support design kits and flow development productivity/qualityJob Qualifications1. Master's degree in Electrical Engineering or Computer Engineering2. Strong proficiency in speaking and writing English3. Thorough understanding of place and route flow4. Excellent interpersonal and communication skills5. Self-motivated and possess excellent team spirit

台積電