Digital Design Verification Engineer

Morgan Philips

  • Taipei City
  • Permanent
  • Full-time
  • 2 months ago
2. Familiar with high speed (PCIE, USB, HDMI, DP) protocol and architecture
3. Knowledge and design experience in design verification, such as UVM/VMM/OVM and system Verilog / Verilog.
4. Scripting experience in Shell, Perl, Python
5. Knowledgeable in DDR/JPEG/H.264/H.265 is a plus.ContactMatt Hsu
+886 2 7750 5717
Fyte
Rm. 3209, 32F, No.333, Sec. 1, Keelung Rd., Xinyi Dist., Taipei City, Taiwan
110 Taiwan
Greater China

Morgan Philips

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