【2024 Campus Recruitment】TSMC Advanced Packaging Technology and Service Engineer

台灣積體電路製造股份有限公司(台積電)(台積電)

  • Baoshan, Hsinchu County
  • Permanent
  • Full-time
  • 2 months ago
【工作內容】 【本職缺僅接受台積電官方網站投遞】
請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址:https://careers.tsmc.com/careers/JobDetail?jobId=4287&source=1111&tags=2024DomesticCampus_1111Description:TSMC's advanced packaging process is an efficient and high-density packaging technology that mainly targets the demand for high-performance semiconductor components, including microprocessors, graphics processors, artificial intelligence chips, etc.This technology uses advanced 3D stacking technology to vertically stack multiple chips and uses high-density packaging materials to fix them together. This technology can improve the performance of components, reduce power consumption, reduce package size, and increase system integration.TSMC's packaging process includes various technologies such as CoWoS, InFO. Among them, CoWoS is a technology that connects different chips through copper wires through silicon interconnect technology to achieve high-frequency and high-speed data transmission. InFO technology directly encapsulates chips on the substrate, connecting chips and substrates through tiny copper wires, achieving a more compact and efficient packaging solution.TSMC's advanced packaging process can improve chip performance and production efficiency, and meet the packaging technology requirements of modern high-performance electronic products, such as smartphones, artificial intelligence, high-performance computing, and other fields.TSMC's advanced packaging organization include Testing R&D Engineer conduct exploratory research in DFT test architecture, evaluate next-gen test technology of several device( logic SOC, HPC, AP, RF, etc.),which used 3D silicon stacking and advanced packaging technologies and closely teamwork with international customer from new product introduction to mass production.Qualifications:1. Bachelor's degree or above in Electrical/Electronic engineering, Computer engineering, Communication, Optical electronics or related fields.
2. Solid technical understanding of semiconductor testing concept.
3. Familiar with programming language.
4. Hands-on participation and a strong sense of ownership.
5. Fluent in English and exhibit good communication skills to work within cross-functional teams.【工作制度/性質】 園 區: 新竹科學園區
工作時間: 日班
休假制度: 週休二日
工作待遇: 面議(經常性薪資4萬含以上)工作性質: 全職
職務類別: 半導體工程師
工作位置: 新竹縣寶山鄉【要求條件】 身份類別: 不拘
工作經驗: 工作經驗不拘
學歷限制: 大學以上
科系限制: 電機工程學類、資訊工程學類語言能力: 「英文」 聽-精通/ 說-精通/ 讀-精通/ 寫-精通【福利制度】 福利制度: 【重視人才,重視未來】
人才是台積電保持領先的關鍵,只有幸福的夥伴,才能打造有競爭力的團隊,
每一位在台積的夥伴都能享有遠超其他企業的薪資與福利。【優質的環境,帶來更多活力】
對台積人而言,生活的豐富和專業的成就同等重要;從食衣住行
的滿足到精神層面的提升,台積人獲得充分的照顧。
1.優質的工作環境
2.員工餐廳與果汁吧、咖啡廳、便利商店及書店
3.運動館及健身房
4.幼兒園
5.員工協助方案及健康中心
6.運動會、家庭日與野餐日詳見企業網站 http://www.tsmc.com/chinese/careers/compensation_benefits.htm如欲投遞其他履歷,請上台積官網 http://www.tsmc.com/chinese/careers/index.htm【職務需求】 到職日期: 不限

1111人力銀行

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