美商社群龍頭_Silicon Package Development Engineer
Adecco
- Sinyi, Taipei City
- Contract
- Full-time
- 《擁有10年以上封裝開發以及製程整合經驗》
- 《對AR/VR相關產品有相關開發經驗者佳》
- 《接受台灣內部出差,無國外出差 / 工作地點可選擇竹北或台北》
- Establish relationship with foundry, OSAT, material supplier & support package development activities for multiple research & product programs as process integration engineer
- Support TV design, process feasibility, simulation, design rule/DFM checks with emphasis on thermo-mechanical reliability with vendor
- Review & maintain all aspects of design integration (DI) before TO, sign-off & keep all DI documentation upto date
- Work with XFN teams, foundries/OSAT, substrate suppliers to understand trade-offs & keep track of technology gaps, reliability risk, yield issues & provide regular updates
- Drive DOEs for initial build and product qualification; drive triage effort with partners for any unexpected inline process, equipment & quality issues
- Coordinate FA, monitor area/customer critical charts & drive all aspects of FA & compilation of POR, TOR, FMEA & related KPIs at the vendor
- BS, MS in Materials Science, Chemical, Electrical, Mechanical Engineering or similar field
- 10+ years of experience in package development and process integration
- Knowledge of adv. packaging manufacturing processes e.g. WLCSP, SiP, FO, PoP, TSV, 3D
- Experience with successful package product qualification with complex package design
- Understanding of device reliability and experience with physical failure analysis
- Experience with DOE, data analysis & pkg design software is a plus
- Experience with display and optic related package is a plus
- Experience with TSV process, 2.5D/3D package and Hybrid bonding is a plus
- Excellent problem solving & communication skills
- Ability to work independently and take on projects with minimum supervision