Forbes前40強-社群美商(新竹)-Silicon Package Development Engineer

Adecco

  • Jhubei, Hsinchu County
  • Contract
  • Full-time
  • 17 days ago
  • • BS, MS in Materials Science, Chemical, Electrical, Mechanical Engineering or similar field
  • • 10+ years of experience in package development and process integration
  • • Experience with successful package product qualification with complex package design
Job Responsibilities:
  • Establish relationship with foundry, OSAT, material supplier & support package development activities for multiple research & product programs as process integration engineer
  • Support TV design, process feasibility, simulation, design rule/DFM checks with emphasis on thermo-mechanical reliability with vendor
  • Review & maintain all aspects of design integration (DI) before TO, sign-off & keep all DI documentation upto date
  • Work with XFN teams, foundries/OSAT, substrate suppliers to understand trade-offs & keep track of technology gaps, reliability risk, yield issues & provide regular updates
  • Drive DOEs for initial build and product qualification; drive triage effort with partners for any unexpected inline process, equipment & quality issues
  • Coordinate FA, monitor area/customer critical charts & drive all aspects of FA & compilation of POR, TOR, FMEA & related KPIs at the vendor
  • Communicate with external partners to evaluate the data
  • Working with suppliers to understand their technologies for the pathfinding
  • Benchmark the component papers to understand their process
  • Work with the manager to align on the next steps.
  • Product Package & Board Design (including but not limited to):
  • Ball Map Review, Freeze Check, Final Stack up, BOM & Design Review
  • Work with PCB vendor on CFM check
  • Cross-check database release to substrate supplier
  • Check the checklist before builds
  • Cross-check substrate supplier is inline with KPI, OQC and stress test
  • Periodic monitoring of delivery schedule
  • Wafers(including but not limited to):
  • FAB OQC, Test & Binning Maps, Thinning, Dicing Specs
  • Track wafer count for development, DOE, Qual, System needs
  • Review wafer level process flow
  • Monitor Different reticle versions
  • Periodic monitoring of lot status
  • Readiness Collateral(including but not limited to):
  • Design collateral, assembly tooling and material readiness
  • Assembly TRA DOEs
  • Structure analysis
  • Line & Test tield
  • Manage marking requirements
  • Review assembly process flow
  • Review build requirements and BOM with execution plan
  • Periodic monitoring of lot status and coordinate sample delivery to different sites
  • Process Integration(including but not limited to):
  • Coordinate first part construction analysis to understand baseline
  • Monitor all concerns, addressed with proposed mitigation actions
  • Create and maintain process & test issue tracker
  • Drive issue resolution and monitor progress
Drive OSAT to compile final POR, TOR, FMEA, KPI post qual for transfer to HVMAdditional Required Qualifications:
  • Knowledge of adv. packaging manufacturing processes e.g. WLCSP, SiP, FO, PoP, TSV, 3D
  • Experience with successful package product qualification with complex package design
  • Understanding of device reliability and experience with physical failure analysis
  • Experience with DOE, data analysis & pkg design software is a plus
  • Experience with display and optic related package is a plus
  • Experience with TSV process, 2.5D/3D package and Hybrid bonding is a plus
  • Excellent problem solving & communication skills
  • Ability to work independently and take on projects with minimum supervision
Education/Experience:
  • BS, MS in Materials Science, Chemical, Electrical, Mechanical Engineering or similar field
  • 10+ years of experience in package development and process integration
ResponsibilitiesExperienceEducation

Adecco

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